X4 CPU commands/registers through SPI

Discussion in 'X4M03' started by Michele Bavaro, Jul 25, 2019.

  1. Michele Bavaro

    Michele Bavaro New Member

    Looking through the XEP source code, this struct
    Code:
    typedef enum {
      X4_SW_REGISTER_FPS_LSB_ADDR = 0,
      X4_SW_REGISTER_FPS_MSB_ADDR = 1,
      X4_SW_FRAME_COUNTER_RESET_VALUE_1_ADDR = 2,
      X4_SW_FRAME_COUNTER_RESET_VALUE_2_ADDR = 3,
      X4_SW_FRAME_COUNTER_RESET_VALUE_3_ADDR = 4,
      X4_SW_FRAME_COUNTER_RESET_VALUE_4_ADDR = 5,
      X4_SW_USE_PERIOD_TRIGGER = 6,
      X4_SW_PERIOD_0_ADDR = 7,
      X4_SW_PERIOD_1_ADDR = 8,
      X4_SW_PERIOD_2_ADDR = 9,
      X4_SW_PERIOD_3_ADDR = 10,
      X4_SW_PERIOD_DIVIDER_0_ADDR = 11,
      X4_SW_PERIOD_DIVIDER_1_ADDR = 12,
    } xtx4_software_register_address_t;
    does not seem to be documented on the X4 data sheet.
    In particular, I don't follow how the X4 FPS timer and its frame counter reset value is set through SPI.

    _x4driver_set_x4_sw_action() and _x4driver_set_x4_sw_register()
    are used extensively throughout the code.. but is it documented elsewhere?
     
  2. Charlie Shao

    Charlie Shao Moderator Staff Member

    Hi Michele,
    There is no detail explanation on these registers. X4_SW_REGISTER_FPS_xxx_ADDR, X4_SW_USE_PERIOD_TRIGGER and X4_SW_PERIOD_x_ADDR are used in XEP.
    They mainly appear in two functions: x4driver_set_fps and x4driver_set_frame_trigger_period, not hard to understand according to the brief introduction ahead of them.
     
  3. Michele Bavaro

    Michele Bavaro New Member

    My point is... that interface seems to belong to the radar's 8051 CPU, where one can configure timers for FPS streaming for example. Does the 8051 CPU run firmware off ROM? Or is it programmable? Please correct me if I am wrong, but there is no documentation anywhere on how to program the X4 CPU registers relevant to raw radar collection. So if one wants to spin a board with two X4s in MIMO configuration and an external MCU controlling both of them, one is left with reverse engineering the functionality of those few registers by reading and mimicking XEP firmware source code?
     
  4. Charlie Shao

    Charlie Shao Moderator Staff Member

    Hi Michele,
    X4 does have a simple internal CPU, but it is transparent for the developer. All X4 configuration can be done at XEP, you can get more detail on this app note. If one wants to use multiple X4s for MIMO design, they do need to transplant and modify XEP, but those registers should not be a big concern, because they are organized in clearly defined functions.
     
  5. Michele Bavaro

    Michele Bavaro New Member

    Makes sense, thanks for the swift reply.